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Memory storage: a completed negative result

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docs/MEMORY_DISTILL_FINDINGS.md
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# MEM-DISTILL-001 findings

Executed 2026-10-05 under the frozen [version 1 protocol](MEMORY_DISTILL_SPEC.md).
All six workers completed and trusted saved-evidence verification passed.
**23 of 149 encodings qualified for exact retrieval; none demonstrated storage
merit.** This is a completed negative compression result, not a failed execution.

## Coverage and exact retrieval

The evaluation covered 960 episodes in 60 groups: five seeds, four families,
three lengths and sixteen episodes per group. Each arm received the same
484,800 supplied events, 103,266 requested reads and 12,209,088 individual-key
probes after mutations. Complete decoded-state traces remain on G:.

The miniature controls covered all 625 four-key states, each possible write,
reset and all-key reads: 45,000 probes per arm, with 31 of 121 arms qualifying.
Both lossless baselines and all seven full-coordinate controls passed.
Constant-code and dropped-coordinate counterexamples detected distinct answers
with identical encodings. Candidate state between operations was packed bytes;
the evaluator never repaired it with the correct state.

The 23 main qualifiers were the two lossless baselines plus, for each of the
seven transforms, its full numerical control and full-retention 12-bit and
16-bit variants. All 126 remaining arms failed the exact qualification gate.
Neither partial coordinate retention nor 4/8-bit precision qualified across
all required controls and main families. The complete [149-row result
table](MEMORY_DISTILL_RESULTS.csv) retains failures, counts and byte totals.

For example, full-retention 8-bit Fourier and zeta variants passed their
miniature controls but produced respectively 58,468 and 33,074 wrong requested
answers in the main world. A miniature pass alone was insufficient. These
observations do not establish the same failure rates for other workloads.

## Complete storage

Numbers below are bytes per observed memory snapshot, averaged over the fixed
event schedule. Standalone includes one complete descriptor per record.
Shared-256 amortizes the actual 256-record bundle envelope and descriptor; it
is an analytical storage calculation over measured snapshots, not an execution
of 256 simultaneous episodes. CUDA execution batches sixteen episodes.
Headers, indices, both complex components and record framing are included.

| Encoding | Exact-qualified | Standalone mean bytes | Shared-256 mean bytes |
|---|---|---:|---:|
| Mixed-radix lossless baseline | Yes | 220.000 | 50.664 |
| Bitmap/nonzero lossless baseline | Yes | 216.316 | 44.988 |
| Identity, all 32 coordinates, 12 bits | Yes | 329.000 | 93.922 |
| Fourier, all 32 coordinates, 12 bits | Yes | 375.000 | 141.914 |
| Zeta phase, all 32 coordinates, 12 bits | Yes | 471.000 | 142.289 |
| Identity, four coordinates, 4 bits | No | 262.000 | 30.906 |

The smallest qualified transform used **2.0877 times** the better baseline's
shared storage. The smaller four-coordinate identity variant reduced shared
storage by 31.3%, but had 48,380 wrong requested answers and 8,291,492 erroneous
individual-key probes. Its smaller record is not adequate exact memory.

The bitmap baseline was best overall, while the mixed-radix baseline was better
on dense and repeated families. The frozen acceptance rule compares against
the better baseline overall and in each family. No transform passed the required
10% reduction with zero errors and no family regression. Reversible zeta
coordinates therefore have no demonstrated storage advantage in this study.

This conclusion is bounded to these formats, axes, transforms, quantizers,
decoder and synthetic schedules. Generic retained-index storage is counted even
when every coordinate is retained. This is not a proof against every specialized
format, variable-precision scheme, structured data distribution or factorization.

## Numerical and execution evidence

CPU decoding of 74,375 exhaustive initial CUDA records produced zero answer
differences. Main-world parity controls also had zero cross-decoder answer
differences. Independently calculated CPU and GPU blobs differed in 84 cases;
bit-identical floating calculations were not required. Maximum full-coordinate
discrepancy was **3.552713678800501e-15**, below the registered 1e-12 tolerance.
Every wrong integer answer still counted against qualification.

The RTX 5070 run took **606.172 seconds** wall time. Measured peak Torch
allocation was **241.226 MiB**, peak reservation **290 MiB**, and peak supervised
process-tree RSS **2.080 GiB**. Retained output occupied **3.092 GiB**, within the
10 GiB limit. Main state-trace files contain 2,311,534,080 bytes including framing.
CUDA kernels were observed by the control profiler; arithmetic used
complex128/float64 with int64 fields and uint8 persistent state, with TF32 disabled.

Across the 60 main groups, recorded synchronized GPU batch time was 308.640s,
serial CPU baseline time 37.421s, setup time 88.446s and transfer/collection time
1.659s. These are different workloads and execution surfaces, not a speedup
comparison. Separate encode/read/update timing distributions are retained.
The batch wall time also includes controls, worker startup, serialization and
supervision. No tensor-core optimization or saturation claim follows.

The verifier regenerated event/oracle observations, recomputed trace metrics and
storage, checked serialized final states and control blobs, and verified source,
input and artifact hashes. It did not rerun every intermediate CUDA operation or
provide independent scientific replication or cryptographic author attestation.

## Source and receipts

| Identity | Value |
|---|---|
| Run | `memory-distill-7b242d8fb532` |
| Tested implementation commit | `6ed6f1405320479bc0e90b40ab5599b00e38677f` |
| Source SHA-256 | `21cf6ef5c9094c7239d39845942ba81590875903540219087210b53cc8a6da6e` |
| Receipt SHA-256 | `e11ec92d3b4a4cff8302b6e34e11a66057993a422a4552ef93b467cea22b5fc7` |
| Protocol SHA-256 | `efe63504a78a15912fad9dbcd2575c935f30a82f7a4b4c1305c20d6360a2b336` |
| Dataset manifest SHA-256 | `f9de21cb6c40b38124eee5edeafe5f306d34686faca32cc51241193ce319d2a6` |

Frozen source, controls, all traces, blobs, results and telemetry are in
`G:/RenigmaLLM_Artifacts/memory-distill-runs/memory-distill-7b242d8fb532/`.
Verification, analysis, test logs and delivery receipt are in
`G:/RenigmaLLM_Artifacts/memory-distill-validation/`.
Development artifacts, including earlier packing/test-harness failures, remain
under the corresponding `distill-development` and validation directories. They
were corrected before the official freeze and are not official passing runs.

Full isolated CPU suite: **1,615 passed, 29 skipped, 27 subtests passed** in
170.10s. Skips retain absent SciPy/Ripser and CPU-environment CUDA limitations.
Focused GPU suite: **140 passed** in 32.54s. Math checks, the supervised CLI and
trusted saved-evidence verification passed. Hosted implementation checks for
Windows, Linux, website, container and disposable backend also passed.

Draft [PR #13](https://github.com/ZuluYokohama/renigma-operational-semantics/pull/13)
is stacked on #12. CodeRabbit was requested; its [response](https://github.com/ZuluYokohama/renigma-operational-semantics/pull/13#issuecomment-6005022196)
reports a developer-seat limit and summary-only service. A successful bot status
does not establish a completed line review. No merge, deployment, visibility
change or independent scientific replication is claimed.

## Next decision

The [indexed tensor-network proposal](TENSOR_NETWORK_DIRECTION.md) now has a
compact exact-storage baseline to beat. Its next protocol should freeze axes,
ranks, precision, live point writes, dense/permuted controls and complete byte
accounting before execution. Tensorization alone does not establish low-rank
structure, and rank truncation cannot be excused when it removes a required
binding. This study introduces no tensor-network arm or general language claim.