REVIEWED PUBLIC SOURCE / HISTORICAL SNAPSHOT
Dimensioned architecture
This is the exact UTF-8 source text at the recorded commit. The implementation repository is private. Older records may describe earlier access, hosting or release decisions; their original wording is preserved. Links and commands inside the record remain inert source text and do not require repository access to read this record.
- Original path
docs/ARCHITECTURE.md- Commit
e6d9e0584066ce0fb4cfb82088c1e7490a886e7b- SHA-256
dad827dab7a6e6e4cdaef44e11e60558af8d92b8a9488d22812304ff8f4a3dea- Size
- 19,270 bytes
Download the exact original bytes · Read the source
# Architecture: local language, verified bindings, and measured computation
The practical goal is to help a person express a request or remembered assertion,
inspect the system's interpretation, correct it, and keep a portable local record.
Research asks which learned mechanisms can preserve that behavior and what their
execution costs are. Mathematical structure earns a place through a testable
contribution to this workflow.
This guide connects the user's original “Enigma And LLMs” conversation
(`6abf8abe-99e8-83ea-ae4c-f1cc9e9f32e4`) and subsequent architecture requests to the
accepted [specification](SPEC.md). It uses the accessible conversation context and
repository contracts; it does not reconstruct missing research reports. The
protocols define experiments; [memory findings and linked receipts](MEMORY_FINDINGS.md)
and [historical routing findings](FINDINGS.md) establish
which executions actually finished. This document makes no new result claim.
## From the intended outcome to a bounded system
| Intent or question | Engineering interpretation | Observable boundary |
|---|---|---|
| Local control over language and records | Local interface, explicit edits and exports, readable versioned formats (R5, R6, R12) | No background saving, external actions, or remote inference in the workbench |
| Create useful value through language | A supported statement creates a named binding; later answers expose the stored value and its source (R8, R12) | Remembering an assertion does not establish its real-world truth |
| Preserve paths and ordered transformations | State changes follow the supplied event order (R1, R2) | Overwrite and reset order is observable; unsupported language stays unresolved |
| Use the GPU as an abstract computational brain | Batched state tensors and explicit update kernels (R7, R10) | Actual GPU execution and costs require execution receipts; hardware inventory alone is insufficient |
| Explore gates, phases, topology, and diffusion | Separate mechanism comparisons and frozen-model diagnostics (R4, R9, R11) | Each addition needs a specific hypothesis and matched controls |
The first two rows are product requirements; the mathematical mappings are
implementation interpretations. Review, export, reset, and offline operation give
people concrete controls. Mathematics provides no guarantee against all coercion
or control. This design implies neither biological equivalence nor universal IP
clearance; existing HDD research remains reference material unless reuse is
established.
## Two human workflows, one boundary around external action
**Request plans** exposes steps, actors, conditions, ordering, prohibitions, and
unresolved wording. Original parser output and user corrections remain separate.
It never fetches or executes mentioned documents or actions.
**Memory & bindings** recognizes remember, change, recall, and reset statements.
Successful writes allocate finite key and value IDs. Unknown queries create no
binding. Unsupported statements and capacity failures remain visible without
partial writes. Correcting the source explicitly replays it and retains earlier
source revisions.
```mermaid
flowchart TD
H[Person supplies or edits local text] --> W[Loopback workbench]
W --> P[Request grammar]
P --> PD[Plan: source, interpretation, corrections]
W --> L[Bounded memory language]
L --> E[Ordered write, read, and reset events]
C[Trusted artifact configured at server launch] --> M
E --> M[Memory engine: labelled dictionary reference or exact learned map]
M --> T[Answers, bindings, slots, and actual write provenance]
PD --> R[Human review]
T --> R
R --> X[Explicit versioned JSON export or validated import]
S[Synthetic research events] --> G[Supervised selector training on local GPU]
G --> A[Checkpoint, export, tests, and receipts]
A --> C
A --> D[Frozen topology, diffusion, and execution studies]
```
Research uses synthetic data; personal conversations do not become training data.
The user configures an artifact at server startup. Imports cannot load model
paths. Without an artifact, the interface explicitly labels the dictionary
reference; its correct answers are not evidence of training.
The loopback server checks Host and Origin, serves local assets, and limits
requests. It keeps no conversation files or request logs. Import checks engine
identity and canonical replay. Source spans count Unicode code points. Syntax,
capacities, and formats are in
[MEMORY_LANGUAGE.md](MEMORY_LANGUAGE.md) and [grammar.md](grammar.md).
## The actual learned model and its dimensions
MEM-001 learns a table of addresses for a fixed vocabulary. It learns no language
encoder, value representation, output head, or controller for unseen key IDs.
Reads and writes share the same address table. The main configuration is:
| Object | Shape or count | Meaning |
|---|---:|---|
| Key IDs | `K = 32` | Fixed input identities used to select address rows |
| Memory slots | `S = 32` | Separately addressable storage locations |
| Value channels | `V + 1 = 65` | 64 supplied symbols plus `UNKNOWN = 0` |
| Batch | `B = 128` | Independent episodes; no information passes between batch rows |
| Learned logits `Z` | `K × S = 32 × 32` | **1,024 learned scalar parameters** |
| Normalized addresses `A` | `K × S` | One probability distribution over slots for each key |
| Active memory `M` | `B × S × (V + 1)` | A 65-component vector at each slot in each episode |
| Read answer | `B × (V + 1)` | Distribution over supplied symbols and UNKNOWN |
| Exported map `h` | 32 integers | Lowest-index argmax slot for each key |
The protocol permits a recorded sizing decision of `B = 64` before freezing the
matrix, never a silent fallback during a run. Calibration dimensions are separate;
see [MEMORY_PROTOCOL.md](MEMORY_PROTOCOL.md).
The active float32 state contains `128 × 32 × 65 = 266,240` numbers:
```text
128 × 32 × 65 × 4 bytes = 1,064,960 bytes ≈ 1.016 MiB
```
This counts one state tensor, not the training budget. Logits alone take 4,096
bytes. Gradients, optimizer states, inputs, retained sequence activations,
evaluation buffers, CUDA context, and allocator reservations add costs. Measured
peak host and device memory determine feasibility.
For one episode, let `a[k] = selector(Z[k])` and let `e(v)` be the fixed one-hot
value vector. Initially every slot is `e(UNKNOWN)`. The update and read are:
```text
write key k, value v: M[j] ← (1 − a[k,j]) M[j] + a[k,j] e(v)
read key k: q ← Σ_j a[k,j] M[j]
reset: every M[j] ← e(UNKNOWN)
```
**Mathematical mechanism argument, in real arithmetic:** fix the normalized
address table and repeat only the distractor write `(d, u)`. Subtracting `e(u)`
from the update multiplies each slot's residual by `1 − a[d,j]`; induction gives,
for `n ≥ 1`,
```text
M_j(n) = (1 − a[d,j])^n M_j(0) + [1 − (1 − a[d,j])^n] e(u).
```
If every `a[d,j] > 0`, all finitely many slots, and thus every fixed normalized
read, converge to `e(u)`. The model's argmax recall therefore eventually returns
`u` even for a protected key `k ≠ d` whose stored value is `v ≠ u`: it cannot
answer correctly for every arbitrarily long finite interference stream. This
does not claim that every finite residual contains zero information. Disjoint
hard addressing instead leaves the protected slot invariant. Passing 2,048
writes is finite evidence, not indefinite retention. This derivation is not an
additional executed experiment or a floating-point theorem; software rounding,
underflow, and exact-zero coefficients can change the recurrence's behavior.
Batch masks apply each episode's event independently. Dictionary answers enter
the training loss; neither dictionary slot choices nor gold answers enter the
state update. Softmax, sparsemax, and 1.5-entmax normalize addresses differently.
All currently train with dense tensors: exact zeros do not automatically remove
GPU operations. Normalizing each key's address row independently imposes no
requirement that different keys choose different slots; injectivity is a separate
property that the learned export must satisfy.
The export uses `h(k)` directly. An injective map gives every key its own slot;
writes and reads share that slot, and reset clears all slots. Induction over
events then gives dictionary equivalence for every finite valid stream. This
premise must be checked. Soft addresses can leak between slots even with an
injective hard map, so soft behavior needs separate tests and disagreement counts.
New human labels receive existing finite IDs; the model has not learned their
meaning. “Remember X is Y” faithfully records supplied information. Source links
identify the responsible write; they do not independently confirm external facts.
Usefulness comes from human interpretation, review, and that visible history.
## What “brain,” “cell,” “fiber,” and “shader” can mean here
These words describe distinct layers:
| Layer | Concrete object | Limit of the analogy |
|---|---|---|
| Human meaning | A reviewed statement, its use, and its accountable source | Numerical closeness is not evidence that two statements mean the same thing |
| Mathematical state | Slot `j` carries a vector `x_j` in `R^65` | One scalar tensor cell is one coordinate, not a biological neuron |
| Optional geometry | A graph with 32 slot nodes and a vector space at every node | Slot adjacency currently has no asserted semantic meaning |
| Software | Encoders, address selection, read/write operators, CPU interpreters, GPU kernels | A shader or compute kernel implements an operation; it is not a mathematical fiber |
| Hardware | CPU/GPU memory, arithmetic units, scheduling, and transfers | The brain analogy supplies no biological equivalence or performance evidence |
The attached spaces may be called fibers. Shared `R^65` coordinates give a trivial
bundle over the finite node set; executing memory requires no bundle machinery.
An edge transport would be a linear map `T(j ← i): R^65 → R^65`, represented by
a `65 × 65` matrix. Current graph diffusion uses identity transport: channel 7
mixes with channel 7 at neighboring slots. Learned transports add assumptions
and parameters and need separate tests. Current GPU execution uses PyTorch CUDA
kernels; a custom shader backend would require parity and cost comparisons.
## Ordered routes and complex phases
Earlier ROUTE-001 tests order-sensitive switching with three lanes and four
learned settings. The 32-slot memory model is a separate architecture.
A cyclic permutation has a Fourier representation with roots-of-unity
eigenvalues: repeated routing accumulates phases. Equivalent coordinates add
neither semantic information nor an established speed advantage. Distinct routes
may fail to commute, so changing their order changes the resulting state.
Prime periods, coprime clocks, prime-log phases, and zeta-related ideas are distinct.
Joint clock periods follow the least common multiple; coprimality does not require
primes. The Riemann hypothesis is not an execution premise. Future arithmetic
treatments require registered comparisons with ordinary matched controls and
practical metrics; see the [theory registry](RESEARCH.md).
## Next research gates
Establish binding, compare selectors, inspect frozen representations, then test
diffusion separately. Fix inputs, controls, budgets, and acceptance before seeing
results. Retain failures; revised hypotheses receive new experiment registrations.
| Gate | What it can establish | Decision boundary |
|---|---|---|
| GPU-001: execution and parity | The selected local GPU actually executes the operators; forward values and gradients match the CPU comparison within registered tolerances | Unsupported devices, resource limits, missing receipts, or interrupted checks do not pass; CUDA never silently becomes CPU |
| MEM-001: learned allocation | Each selected treatment completes its requested updates, passes per-family soft checks, and exports an independently verified hard map | Retention includes every key and constant-value interference; preserve failures and soft/hard disagreements; use the frozen protocol rather than choosing a favorable seed |
| LANG-001: reviewed use | Remember, overwrite, recall, reset, unknowns, source history, and export/import behave as documented | Label reference and learned engines distinctly; expose finite capacities and unsupported wording |
| EXEC-001: implementation cost | Dictionary, integer-slot, dense tensor, and indexed tensor implementations agree on the same events | Report complete wall costs and separate CUDA device timings; sparse coefficients alone justify no speed claim |
| TOPO-001: descriptive geometry | Frozen soft, hard, and uniform variants yield reproducible bounded persistence measurements | No topology result certifies correctness, causality, semantic meaning, or event order |
| DIFF-001: intervention | Mixing values over a fixed graph helps or harms measured recall under controlled conditions | Compare identity, fixed slot permutation, and matched mean mixing; retain damaged binding as a valid finding |
TOPO-001 uses CPU H0/H1 persistence on at most 128 sampled query points. Each
concatenates memory and query address: `32 × 65 + 32 = 2,112` coordinates. Distance
and scaling are fixed. Coordinate permutation preserves distances; temporal
reordering preserves the cloud. These controls expose why topology cannot
establish semantics or sequence-sensitive understanding.
DIFF-001 fixes an undirected cycle over 32 slots. Its Laplacian `L` defines
`H(tau) = exp(-tau L / lambda_max(L))`. After writes, apply `M ← H(tau) M` along
the slot axis independently per episode. Zero strength is identity; smoothing may
erase distinctions required for recall. This finite graph heat operator is not
a continuum PDE model of a brain. Keep its graph and controls fixed regardless
of results. See [MEMORY_DIAGNOSTICS.md](MEMORY_DIAGNOSTICS.md).
A next language model needs specified new expressions, correct-answer criteria,
unknown handling, and human correction. Unseen-key routing, learned graphs,
transports, topological losses, and phase controllers each need separate
comparisons. Defer them when no measured limitation motivates them.
A learned language gate remains a frozen set of held-out paraphrases of the
existing remember, change, and recall operations. Compare exact canonical events
and final bindings against human-specified answers and the current grammar.
Include ambiguous and unsupported expressions: these must remain unresolved and
must not write a binding. Freeze the split and acceptance rules before fitting
an encoder. LANG-002 instead broadens a finite authored grammar and adds review
before adoption; it does not establish this learned-encoder gate. Its source
history tags the grammar version, preserving earlier saved interpretations.
A separate EXEC-002 execution hypothesis is parallel prefix scan. Per-slot writes
are affine maps `x ← a*x + b`; composing two gives
`(a2*a1, a2*b1 + b2)`, associative over real arithmetic. This suggests a separately
registered scan experiment to reduce sequential dispatch. Preserve event order,
reset and query behavior, and compare forward/gradient parity, floating-point
rounding, full input/output cost, and peak memory. Its acceptance and measurements
are separate from the historical EXEC-001 results; see the frozen
[EXEC-002 protocol](MEMORY_SCAN_PROTOCOL.md). Background: [Blelloch's prefix-sum report](https://www.cs.cmu.edu/afs/cs.cmu.edu/project/scandal/public/papers/CMU-CS-90-190.html)
and [Martin and Cundy's parallel linear recurrences](https://arxiv.org/abs/1709.04057).
Their measured speedups do not transfer automatically to this model or hardware.
The scan gives time its own axis. Multipliers have shape `128 × 96 × 32 × 1`;
increments and prefix states have shape `128 × 96 × 32 × 65`. One full float32
state tensor is 97.5 MiB, before other arrays or autograd retention. A doubling
scan uses seven levels at 96 events and O(T log T) work. This exchanges sequential
dispatch for more parallel work and memory traffic. Both costs must be measured.
The recurrence stays chronological: the later operator composes after the earlier
one, including at writes and resets. Associativity does not permit event reordering.
The useful chain from language to numerical state is therefore explicit:
```mermaid
flowchart LR
S[Original source] --> G[Versioned grammar]
G --> R[Review canonical operations and answers]
R --> E[Edit source and review again]
E --> G
R --> A[Explicit adoption]
A --> D[Portable record with source and provenance]
G --> M[Configured memory engine]
M --> R
```
Human intent supplies the meaning of the labels and the purpose of the task.
The finite engine supplies tested storage behavior. Topology describes selected
state geometry; an optional graph heat operator changes that state. Algebra,
probability, numerical analysis and systems measurements remain necessary beside
topology and PDE-inspired methods. No single mathematical representation provides
the entire account of language, agency or human value.
## Resource and evidence boundary
Source stays here; environments, caches, and runs use the external artifact root,
normally `G:\RenigmaLLM_Artifacts`, without silent relocation. The machine's 32 GB
host RAM and 12 GB GPU are not budgets to consume fully. Registered ceilings are
12 GiB parent/child RAM, 8 GiB monitored GPU allocation with headroom, 30 minutes
per run, two hours per batch invocation, 10 GiB output, and 5 GiB drive reserve.
Diagnostics have smaller budgets. Windows allocator monitoring is not OS-enforced
isolation. NPU execution is outside the implemented contract.
Source fingerprints, configurations, hashes, initializations, partial states, and
receipts connect results to code. Completed training and scientific acceptance
are separate fields. Exact replay checks hard behavior, not historical soft
training. Independent replication, general understanding, novelty, and publication
require further evidence.
## Finite representation laboratory
REP-001 adds a separate experiment entry point. `representation.py` defines
the finite state/action oracle and exact partition controls;
`representation_math.py` supplies typed coordinate, variational and degeneracy
controls. `representation_learning.py` contains the three paired objectives,
training-only split, composition evaluation, refit diagnostic and quantization.
`representation_study.py` freezes inputs and source, supervises one CUDA worker
and verifies retained evidence. These modules do not replace the workbench's
grammar or use its user-provided records as training material.
The tensor dimensions are explicit: observation batch x16, latent batch xd,
and eight affine operator matrices 8xdx(d+1), with a final homogeneous bias
coordinate. A 580-edge batch trains one-step operations. Evaluation batches
combine action words and the 98 possible initial states. Geometry is an
inductive choice in these learned coordinates; a successful commutator alone
does not supply the observation decoder or establish useful meaning.